PLL: Yes with Bypass, Hyrja: HCSL, HSTL, LVDS, LVPECL, MLVDS, SSTL, Produkti: HCSL, HSTL, LVDS, LVPECL, MLVDS, SSTL, Numri i qarqeve: 1, Raporti - Input: Output: 2:6,
Lloji: Clock Generator, Fanout Distribution, Zero Delay Buffer, PLL: Yes with Bypass, Hyrja: HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL, Produkti: eHSTL, HSTL, LVCMOS, LVTTL, SSTL, Numri i qarqeve: 1, Raporti - Input: Output: 2:20,
Lloji: Clock Generator, Fanout Distribution, Zero Delay Buffer, PLL: Yes with Bypass, Hyrja: HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL, Produkti: eHSTL, HSTL, LVCMOS, LVTTL, SSTL, Numri i qarqeve: 1, Raporti - Input: Output: 2:12,
Lloji: Clock Generator, Fanout Distribution, Zero Delay Buffer, PLL: Yes with Bypass, Hyrja: HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL, Produkti: eHSTL, HSTL, LVCMOS, LVTTL, SSTL, Numri i qarqeve: 1, Raporti - Input: Output: 2:16,
Lloji: Clock Generator, Fanout Distribution, Zero Delay Buffer, PLL: Yes with Bypass, Hyrja: HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL, Produkti: eHSTL, HSTL, LVCMOS, LVTTL, SSTL, Numri i qarqeve: 1, Raporti - Input: Output: 2:4,
Lloji: Clock Generator, Fanout Distribution, Zero Delay Buffer, PLL: Yes with Bypass, Hyrja: HSTL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL, Produkti: eHSTL, HSTL, LVCMOS, LVTTL, SSTL, Numri i qarqeve: 1, Raporti - Input: Output: 2:8,
